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t, if true, could redefine industry benchmarks.</p><h1 id="82e2">Fabric in Action</h1><p id="15b7">Efficient Computer has already implemented the Fabric processor architecture in its ‘Monza’ test system on a chip (SoC), as announced in a press release.</p><h1 id="20dc">The Secret Sauce: Optimizing for Parallelism</h1><p id="40f6">The core innovation behind Fabric is its ground-up optimization for parallelism. Unlike conventional CPUs burdened with legacy complexities for backward compatibility, Fabric employs a simplified, reconfigurable dataflow architecture to execute code across numerous parallel computing elements.</p><h1 id="4b5b">Technical Roots and Spatial Parallelism</h1><p id="37de">The foundation of this design can be traced back to over seven years of research at Carnegie Mellon University. Fabric exploits spatial parallelism by executing different instructions simultaneously across the physical layout of the chip. An on-chip network efficiently links these parallel computing elements.</p><h1 id="bdd8">Software Support and Simplified Integration</h1><p id="e77c">Efficient’s software stack supports major embedded languages like C, C++, TensorFlow, and select Rust applications. This allows app developers to quickly recompile their

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code for the Fabric architecture. The startup emphasizes that Fabric’s compiler was developed in tandem with the hardware, ensuring seamless integration.</p><h1 id="7086">Challenges and Target Markets</h1><p id="8fa7">While the need for software recompilation may pose a challenge for mainstream adoption, Efficient Computer initially targets specialized sectors. These include health devices, civil infrastructure monitoring, satellites, defense, and security — areas where the power efficiency advantages of Fabric would be most valuable.</p><h1 id="9805">Unique Approach to Parallel Computing</h1><p id="225f">Under the hood, Fabric adopts a distinctive approach to parallel computing. Though specifics of the processing architecture are undisclosed, descriptions suggest a flexible, reconfigurable processor capable of optimizing itself for different workloads through software-defined instructions.</p><h1 id="4ecf">Funding and Future Plans</h1><p id="3f38">Efficient Computer has secured $16 million in seed funding from Eclipse Ventures, likely aimed at the launch of their first Fabric chips. The company has reportedly inked deals with undisclosed partners, and they are gearing up for production silicon shipping in early 2025.</p></article></body>

A New Startup Claims 100x Better CPUs, Gets $16M in Funding

Photo by Jorge Salvador on Unsplash

In the realm of chip design, the focus has shifted to power efficiency, with every designer aiming to deliver better performance using less energy. A recent entrant, Efficient Computer Corp., claims to have achieved a groundbreaking leap in this pursuit with their newly unveiled processor architecture named “Fabric.”

Unveiling the Fabric Chip Design

Efficient Computer recently emerged from stealth mode, showcasing their innovative “Fabric” chip design. According to the company, this unique CPU promises performance comparable to current offerings but with a significantly reduced energy footprint. They assert that it is 100 times more efficient than the “best embedded von Neumann processor” and 1,000 times more economical than power-intensive GPUs — an extraordinary claim that, if true, could redefine industry benchmarks.

Fabric in Action

Efficient Computer has already implemented the Fabric processor architecture in its ‘Monza’ test system on a chip (SoC), as announced in a press release.

The Secret Sauce: Optimizing for Parallelism

The core innovation behind Fabric is its ground-up optimization for parallelism. Unlike conventional CPUs burdened with legacy complexities for backward compatibility, Fabric employs a simplified, reconfigurable dataflow architecture to execute code across numerous parallel computing elements.

Technical Roots and Spatial Parallelism

The foundation of this design can be traced back to over seven years of research at Carnegie Mellon University. Fabric exploits spatial parallelism by executing different instructions simultaneously across the physical layout of the chip. An on-chip network efficiently links these parallel computing elements.

Software Support and Simplified Integration

Efficient’s software stack supports major embedded languages like C, C++, TensorFlow, and select Rust applications. This allows app developers to quickly recompile their code for the Fabric architecture. The startup emphasizes that Fabric’s compiler was developed in tandem with the hardware, ensuring seamless integration.

Challenges and Target Markets

While the need for software recompilation may pose a challenge for mainstream adoption, Efficient Computer initially targets specialized sectors. These include health devices, civil infrastructure monitoring, satellites, defense, and security — areas where the power efficiency advantages of Fabric would be most valuable.

Unique Approach to Parallel Computing

Under the hood, Fabric adopts a distinctive approach to parallel computing. Though specifics of the processing architecture are undisclosed, descriptions suggest a flexible, reconfigurable processor capable of optimizing itself for different workloads through software-defined instructions.

Funding and Future Plans

Efficient Computer has secured $16 million in seed funding from Eclipse Ventures, likely aimed at the launch of their first Fabric chips. The company has reportedly inked deals with undisclosed partners, and they are gearing up for production silicon shipping in early 2025.

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